1. Field of the Invention
The present invention relates to a thin film transistor and a flat panel display having the same, and more particularly, to the structure of a thin film transistor enabling smooth electrical communication between source and drain electrodes, and a flat panel display having the same.
2. Discussion of the Background
A thin film transistor (TFT) included in flat panel displays (FPDs), such as liquid crystal displays (LCDs), and organic or inorganic electro-luminescence (EL) displays, is used as a switching device for controlling the operation of each pixel and/or a driving device for driving each pixel.
A conventional TFT includes a semiconductor layer, a gate electrode, and source and drain electrodes. The semiconductor layer includes source and drain regions doped with impurities and a channel region provided between the source and drain regions. The gate electrode is electrically insulated from the semiconductor layer and provided in a position corresponding to the channel region. The source and drain electrodes are in contact with the source and drain regions, respectively.
TFTs have recently been adapted for use in various other technologies, such as smart cards, e-papers, and roll-up displays, which require highly flexible thin-film electronic devices. As a result, the TFTs should include a highly flexible substrate, such as a plastic substrate.
However, a conventional formation of an inorganic semiconductor layer involving a high-temperature process performed at 300° C. or higher cannot employ a plastic substrate since such material is intolerant of heat.
Research for a polysilicon fabricating process that satisfies design specification and enables low-temperature processes is currently being conducted, however such research has thus far failed to realize the anticipated result.
Therefore, to solve this problem, much attention is now focused on organic semiconductors since an organic semiconductor layer may be formed at a sufficiently low temperature.
Japanese Patent Laid-open Publication No. 2003-282883 discloses a bottom-contact type organic semiconductor transistor, in which an organic semiconductor layer is formed on a surface of a gate insulating layer covering a gate electrode, and source and drain electrodes are formed on a surface of the organic semiconductor layer.
Also, in Japanese Patent Laid-open Publication No. 2003-092410, a top contact type organic TFT is provided with a gate electrode, which is located in a position corresponding to a channel region, and the channel region, is formed of organic compounds having radicals.
In the conventional organic TFTs discussed above, source and drain electrodes are typically formed of noble metals, such as Au, to enable smooth electrical communication between the source and drain electrodes and an organic semiconductor layer. In this case, the noble metals forming the source and drain electrodes greatly deteriorate adhesion to stack layers disposed thereunder, particularly, an insulating layer formed of SiNx or SiO2.
To improve adhesion between a Pt electrode and an SiO2 insulating layer disposed thereunder, Korean Patent Laid-open Publication No. 2003-3067 proposes an organic TFT that further includes an adhesion improving layer formed of Ti.
FIG. 1A is a cross-sectional view of a conventional organic TFT including an adhesion improving layer. Referring to FIG. 1A, a gate electrode 12 is formed on a surface of a substrate 11, and a gate insulating layer 13 is formed thereon to cover the gate electrode 12. A source electrode 15a and a drain electrode 15b are formed on a surface of the gate insulating layer 13, and an organic semiconductor layer 16 is formed thereon. Between the source and drain electrodes 15a and 15b and the gate insulating layer 13, an adhesion improving layer 14 formed of Ti is disposed.
The organic TFT operates by applying electric signals to the gate electrode 12 and the source and drain electrodes 15a and 15b. An example of the operating method of the organic TFT is illustrated in FIG. 1B, which is a partial exploded view of a portion “A” shown in FIG. 1A.
Referring to FIG. 1B, when the organic semiconductor layer 16, an active layer, is a p-type semiconductor, a negative voltage is applied to the gate electrode 12, and a predetermined voltage is applied to the source and drain electrodes 15a and 15b, charge carriers accumulate in a lower portion of the organic semiconductor layer 16, which contacts the gate insulating layer 13, thereby forming an accumulation layer 16a. However, a work function difference between Ti forming the adhesion improving layer 14 and the organic semiconductor layer 16 prevents efficient electrical communication or significantly reduces the efficiency of such communication. Accordingly, when the accumulation layer 16a is formed in a portion or region of the organic semiconductor layer 16 that is adjacent to the gate insulating layer 13, an electric signal input from the source electrode 15a may not be transmitted through a channel region of the organic semiconductor layer 16 to the drain electrode 15b. 
Thus, when a TFT is used to select a pixel of an FPD or drive the pixel, a desired pixel may not be selected or an electric signal may not be applied to a selected pixel. As a result, the screen quality of the FPD may be adversely affected.